【 以下文字转载自 CSArch 讨论区 】
发信人: illumine (Emacs+LaTeX+Linux=MyWorkstation), 信区: CSArch
标  题: Intel Internship Opportunity
发信站: 水木社区 (Wed Jul 11 14:39:53 2007), 站内

Intel Internship Opportunity



-  Assignment Title:  Hardware Intern

-  Department:     Intel CTL(Communication Technology Lab) Beijing

-  No. of Openings: 2

-  Location: Beijing



   -- Position 1: FPGA Intern

-  Skill & Background requirement

            1. 1 ~ 2 years experience on FPGA design

            2. Good VHDL coding skill

            3. Experience on FPGA system integration and debug

            4. Familiar with Ethernet protocol is a plus



    -- Position 2: Hardware intern

      - Skill & Background requirement

        1. 1~2 years experience on hardware schematic design

        2. Mastering Cadence PSD tool ConceptHDL and Allegro

        3. Basic VHDL coding skills

        4. Xilinx FPGA/ RocketIO experience is a plus



-  General requirements,

        1. At last 3 days' working per week, continue 3 months at least

        2. Team work and communication skills



If you are interested in the internship of CTL, please don't hesitate to send your resume (as attachment) to lu.cao@intel.com, using the subject: "HW Intern Position X (1/2)"


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FROM 202.101.8.*