-Department: Intel Communication Technology Lab Beijing
-Location: Beijing
Position:  FPGA Intern on wireless transceiver control/calibration.
Description:
Work with other team member to design/implement control/calibration algorithm for wireless transceiver linearity improvement.
-Skill & Background required
At least 1 year design experience with FPGA
Experienced in VHDL or verilog programming
Experienced in Xilinx FPGA design tools
Familiar with Baseband and RF transceiver control/calibration is a plus
Familiar Xilinx system generator and Matlab co-simulation is a plus.
-General requirements
MS or Ph.D candidate in EE or CS
At least 4 days (normal working time) per week for half year

If you are interested in this position, pls send your resume to sunny.zhang@intel.com with the title CTL beijing intern.
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FROM 202.101.8.*